Studies of InAIAs/InGaAs and GaInP/GaAs Heterostructure FET's for High Speed ApplicationsUniversity of Michigan., 1992 |
Continguts
Ga0 51Ino 49PGaAs HETEROSTRUCTURE DEVICES | 11 |
LOWFREQUENCY NOISE AND FREQUENCY DISPERSION | 50 |
PCHANNEL InAlAsInxGa1 xAs x 0 53 0 65 STRAINED | 65 |
No s’hi han mostrat 4 seccions
Frases i termes més freqüents
1/f noise 2DEG AlGaAs/GaAs HEMT's bias conditions C+Ar carriers cm²/V-sec co-implantation conduction band D-mode deep traps demonstrated doped drain-source current Ids Drain-source voltage dual-channel E/D-mode HIGFET Electron Device Lett enhancement evaluated fabricated Figure frequency GaAs GaInP GaInP/GaAs HEMT's gate bias Gate dimensions gate leakage gate voltage gate-length Gate-source voltage gm-Vgs HEMT heterostructures HIGFET inverters I-V characteristics Ids-Vds characteristics IEEE Electron Device impact ionization implant InAlAs buffer InAlAs/InGaAs HIGFET's InAlAs/InxGa1-xAs increase InGaAs InGaAs channel integrated circuits InxGa1-xAs ion implantation Isub kink kink effect lattice matched layer lift-off measurements mesa mobility mS/mm noise margin observed ohmic contacts output conductance p-buffer p-doped p-type pinch-off Schottky barrier semiconductor sheet charge density short-channel shown in Fig shows sidegating single-channel strained channel substrate injection subthreshold current threshold voltage threshold voltage Vth transconductance transfer characteristics undoped InAlAs valence band values voltage Vds Vth shift WSix film WSix gates