The Art of Designing Embedded Systems
Newnes, 3 de jul. 2008 - 312 pÓgines
Jack Ganssle has been forming the careers of embedded engineers for 20+ years. He has done this with four books, over 500 articles, a weekly column, and continuous lecturing. Technology moves fast and since the first edition of this best-selling classic much has changed. The new edition will reflect the author's new and ever evolving philosophy in the face of new technology and realities.
Now more than ever an overarching philosophy of development is needed before just sitting down to build an application. Practicing embedded engineers will find that Jack provides a high-level strategic plan of attack to the often times chaotic and ad hoc design and development process. He helps frame and solve the issues an engineer confronts with real-time code and applications, hardware and software coexistences, and streamlines detail management.
Chapter 1 - Introduction
Chapter 2 – The Project
Chapter 3 – The Code
Chapter 4 – Real Time
Chapter 5 – The Real World
Chapter 6 – Disciplined Development
Appendix A – A Firmware Standard
Appendix B - A Simple Drawing System
Appendix C – A Boss’s Guide to Process
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The Real World
A Firmware Standard
A Simple Drawing System
A Bosss Guide to Process Improvement
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Frases i termes mÚs freqŘents
algorithm approximation assembly language Barry Boehm bounce bugs called chip clock CMMI COCOMO code inspections compiler complex const double contracts cosine cost create dash number debounce debugging decimal digits define Design By Contract developers device documentation embedded systems error estimate execution FIFO Figure firmware firmware standard float floating point function global hardware implement in-circuit emulator input argument interrupt lines of code Lint logic look loop malloc Master Drawing Book memory metastable microseconds module never options output polynomial postcondition postmortem problem processor radians range reduction code real-time reduce reentrant requires resistor result routine RTOS rule run-time schedule signal simple sort sure switch tasks team members there’s things timer UART variable vector vendors we’re write zero
PÓgina 45 - Tis but thy name that is my enemy; Thou art thyself, though not a Montague. What's Montague? it is nor hand, nor foot, Nor arm, nor face, nor any other part Belonging to a man. O, be some other name ! What's in a name? that which we call a rose By any other name would smell as sweet; So Romeo would, were he not Romeo call'd, Retain that dear perfection which he owes Without that title.
PÓgina 50 - he has all the marks of one unused to composition, to whom writing is a painful task." In his hand the measuring-rod was a far mightier implement than the pen. His turgid and pompous rhetoric displays itself in the introductions to the different books, where his exaggerated effort to introduce some semblance of style into his commonplace lectures on the noble principles which should...
PÓgina 15 - A single CPU manages a disparate array of sensors, switches, communications links, PWMs, and more. Dozens of tasks handle many sorts of mostly unrelated activities. A hundred thousand lines of code all linked into a single executable enslaves dozens of programmers all making changes throughout a byzantine structure no one completely comprehends. Of course development slows to a crawl.
PÓgina 15 - Communications overhead requires a bit more code so we've added 10% to the 100-KLOC base figure. The schedule collapses to 909 man-months, or 65% of that required by the monolithic version. Maybe the problem is quite orthogonal and divides neatly into many small chunks, none being particularly large. Five processors running 22 KLOC each will take 1030 manmonths, or 73% of the original, not-so-clever design.
PÓgina 130 - ... and we had to develop a feel for the fact that the answer was about 0.06 rather than 0.6 or 0.006. These requirements on our judgment made us realize two important things about engineering: first, answers are approximations and should only be reported as accurately as the input is known, and, second, magnitudes come from a feel for the problem and do not come automatically from machines or calculating contrivances.
PÓgina 15 - The product reaches consumers' hands twice as fast and development costs tumble. You're promoted and get one of those hot foreign company cars plus a slew of appreciating stock options. Being an engineer was never so good.
PÓgina 123 - This small difference might represent just a tiny change in angle. We request a read at just about the same time the data changes; our input operation strobes the capture register's clock creating a violation of set-up or hold time. Every input bit changes; each of the flip-flops inside...
PÓgina 125 - ... possible that the delays may cause the input to transition at the same time as the clock. Instant metastability. Designers are pretty careful to avoid these situations, though. Do be wary of FPGAs and other components where the delays vary depending on how the software routes the device.
PÓgina 55 - AT&T found inspections led to 14% increase in productivity and tenfold increase in quality. • HP found 80% of the errors detected during inspections were unlikely to be caught by testing. • HP, Shell Research, Bell Northern, and AT&T all found inspections 20-30 times more efficient than testing in detecting errors.
PÓgina 120 - ... bits are stored and can be read by the software at any time, with no fear of things changing between reads. Some designers tie the register's clock input to one of the port control lines. The I/O read instruction then automatically strobes data into the latch, assuming one is wise enough to insure the register latches data on the leading edge of the clock.
ReferŔncies a aquest llibre
Designing Embedded Communications Software
Previsualitzaciˇ limitada - 2003
Tots els resultats de Google Llibres »
The In-System Configuration Handbook:: A Designer愀 Guide to ISC
Neil G. Jacobson
Previsualitzaciˇ limitada - 2004